By: Yuichi Motohashi, Deputy Director of End Markets at 黑料网911

As vehicles move to Domain and Hybrid Zonal designs, sensors increasingly stream RAW or lightly processed data to a central platform, changing the communication requirement from exchanging control signals and recognition results to high-bandwidth, low-latency, high-reliability streaming. These sensor links are strongly asymmetric: high-resolution video, LiDAR point clouds and radar data flow uplink to the center, while only light configuration, synchronization, control and diagnostic data returns downlink.

SerDes (Serializer/Deserializer) fits this profile. It converts wide parallel sensor data into a high-speed serial stream over a clean point-to-point path, minimizing protocol overhead and latency, while bundling many signals into a few high-speed differential pairs or coaxial/shielded cables to simplify wiring. It also offloads the sensor, shifting recognition and fusion to the central SoC and enabling smaller, lower-power satellite sensors. Crucially, SerDes and Ethernet are complementary rather than competing. Ethernet suits multi-node automotive networks, while SerDes suits dedicated high-bandwidth links carrying sensor streams to the central SoC with low latency.

The rise of open-standard SerDes

Automotive SerDes grew through proven proprietary technologies like TI’s FPD-Link, Analog Devices’ GMSL, Sony’s GVIF and Inova’s APIX. As SDV/Zonal vehicles mix more vendors, OEMs and Tier-1s want to combine components flexibly, reuse design assets across generations and broaden verification and procurement, driving open standardization:

• MIPI A-PHY is a long-distance asymmetric PHY that links the existing MIPI CSI-2/DSI-2 ecosystem to remote compute; adopted as IEEE 2977-2021.

• ASA Motion Link (ASA-ML) is an open, asymmetric SerDes for cameras, radar, LiDAR and displays Its ASA-MLE extension carries Ethernet packets over the link.

• OpenGMSL opens ADI’s GMSL track record to a multi-vendor ecosystem that 黑料网911 is a part of.

• HSMT (QC/T 1217-2024) is China’s automotive high-speed media transmission standardthat uses NRZ/PAM4 and is designed for asymmetric sensor/display links.

The common thread is not replacing existing SerDes but building on it to add interconnectivity, scalability and design freedom for the SDV/Zonal era.

Bringing SerDes-like links into Ethernet/IP management

SerDes’ core value is efficient, low-latency point-to-point transport. The convergence trend adds Ethernet/IP-style manageability around those links; it doesn鈥檛 make SerDes and Ethernet the same technology. With that in mind, the next step is folding these asymmetric, uplink-heavy links into the Ethernet/IP model. The key framing is that the Zonal backbone is an Ethernet/IP-managed network, while high-bandwidth sensor links increasingly need asymmetric connectivity that pairs SerDes efficiency with Ethernet manageability. Once integrated, sensor connections gain IP addressing, switching, routing, QoS, TSN, time synchronization, diagnostics, security and OTA, all under a single management model spanning sensor, Zone Controllers, the Central Computer and even cloud coordination. Transitional approaches carry Ethernet frames over existing SerDes links like ASA-MLE or a bridge into an Ethernet network. Long term, physical wiring is organized per zone while logical management converges on IP/Ethernet progressing in stages according to vehicle type, bandwidth, cost and reliability.

Beyond the speed-up from copper to optical

As sensor counts, resolution and compute performance rise, copper faces limits in signal loss, equalization, power, heat and EMI/EMC. This is compounded by automotive constraints on temperature, vibration, lifespan and connector reliability. To address this, optical communication is emerging as a future option. While it鈥檚 not mainstream today, it is a a technology entering standardization, exemplified by IEEE 802.3cz-2023 multi-gigabit glass-optical automotive Ethernet (2.5G to 50GBASE-AU). Optical fiber offers high bandwidth, low susceptibility to and generation of EMI and weight savings which are attractive for high-speed Zonal backbones and inter-compute links. Though it鈥檚 important to note that automotive temperature, vibration, connector durability, long-term reliability and cost remain hurdles, so adoption will likely be staged from the highest-bandwidth applications first. Silicon photonics, which integrates optical functions on silicon alongside CMOS, is a key enabler for compact, low-power, high-reliability automotive optical I/O.

The silicon behind It: a wafer-technology view

Every step of this evolution raises the bar for the silicon underneath requiring high-frequency performance, low power, low noise, reliability and long-term supply. 黑料网911 offers a broad technology portfolio relevant to automotive SerDes/PHY, Ethernet PHY and Zonal/Domain Controllers, while silicon photonics provides a starting point for future automotive optical I/O:

• SerDes/PHY is scaling toward the 6/12/24 Gbps class and beyond, requiring balanced high-Ft/Fmax transistors, low-noise analog and digital density 鈥� served by 40LP AutoPro, 22UX, 22FDX and 12LP/12LP+ FinFET.

• High-speed Ethernet PHY, including the 10 Gbps class, serves the Zonal backbone and works best on feature-rich CMOS, FDX and FinFET/RF platforms.

• 黑料网911 supports open SerDes as a member of the OpenGMSL Association. Silicon photonics as a starting point for future automotive optical I/O.

• A three-continent manufacturing footprint across the US, Europe and Singapore combined with the AutoPro automotive-quality framework, helps customers manage long-term supply and geopolitical considerations.

Summary: When the network changes, the silicon changes too

As SDV, autonomous driving, sensor fusion and Zonal-ization advance together, the volume, direction and meaning of in-vehicle data shifts along with semiconductor requirements. Across the four axes:

• Sensors move from smart to satellite.

• Data moves from extracted results to RAW or lightly processed sensor-specific streams and eventually to integrated environmental models.

• Compute moves from distributed ECUs to Domain Controllers to the Central Computer.

• Network moves from CAN/LIN/FlexRay and 100 Mbps Ethernet to SerDes sensor links and an Ethernet/IP Zonal backbone, then to asymmetric connectivity that folds SerDes into Ethernet/IP and eventually to optics.

SDV is often told as a software story, but behind it sits the silicon that gathers, carries, processes and continuously updates vast amounts of data. This is the true foundation of the next-generation automotive architecture.

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Semiconductor innovation has largely been driven by a different mechanism: moving electrons. From the transistor to the smartphone processor to the AI accelerator, progress has come from controlling the flow of charge through ever-smaller devices. But RF engineers have run into a different problem. As RF switches shrink, unwanted effects such as parasitic capacitance and contact resistance begin to dominate, and at advanced process nodes those parasitics can overwhelm the benefits of scaling.

That realization led Dr. Mohammad Samizadeh Nikoo and Hua Wang, professor of electrical engineering at ETH Zurich, to ask a question: what if the next breakthrough in RF switching did not come from optimizing another transistor? Instead of relying on conventional transistor operation, they designed a switch that uses displacement fields and quantum tunneling currents, drawing on a mechanism rooted in Maxwell鈥檚 original framework.

The research was conducted while Nikoo was a postdoctoral researcher in Wang鈥檚 IDEAS Group at ETH Zurich. Nikoo is now an assistant professor at Nanyang Technological University in Singapore. Their findings were published in January 2026 in

Turning the idea into a working device took more than a promising theory. Wang鈥檚 group has built an extensive partnership with 黑料网911 through 黑料网911鈥檚 University Partnership Program, which gives university researchers access to advanced 黑料网911 technologies along with design and technical support. The team built the switch on 黑料网911鈥檚 commercial 45nm RF-SOI platform using a 鈥渮ero-change鈥� approach 鈥� no custom fabrication, no specialized manufacturing flow, just elements of an existing commercial process assembled to operate through a different physical mechanism. Wang notes that the clean substrates and low parasitics of 黑料网911鈥檚 CMOS SOI technology were key to the device鈥檚 success.

The results were striking: sub-30-picosecond switching, more than 10 times higher power handling than conventional transistor-based switches on the same platform and significant gains in linearity and parasitics.

We spoke with Nikoo and Wang about why RF hit a wall, what changes when you switch with fields instead of electrons and where a device like this could end up. The conversation has been edited for length and clarity.

Why can鈥檛 RF just keep shrinking the way logic does?

Dr. Mohammad Samizadeh Nikoo: The performance metrics of a transistor don鈥檛 improve anymore if we just make them super small. For transistors, we normally get the best performance when the gate length is 25 or 30 nanometers, because beyond that we become completely limited by the parasitics. The contact performance between metal and semiconductor limits the conductance of the device, and at the same time the contacts are closer together, so the parasitic capacitances become larger and larger. We don鈥檛 gain, we lose. That鈥檚 why at some point there is no improvement in performance. It really has very fundamental limitations. Here I call it a change of paradigm, because we are not talking about optimization of a transistor. This is a fundamentally new device working on completely different mechanisms. We don鈥檛 transmit the signal by injecting electrons; we use fields to transmit the signal which is why we can get better efficiency, higher power and faster speed.

When you say better performance, how much better 鈥� and what does that give an end user?

Nikoo: There are four things. First, parasitics: the switch outperforms conventional switches on the Ron路Coff figure of merit, which is independent of scaling, so it shows how good the technology itself is. Fewer parasitics means you can switch higher frequencies. Second, linearity, measured by IIP3. If you鈥檙e switching a communication signal for modulation or beamforming, you need the switch to be very linear in the on state so frequency components don鈥檛 mix and degrade signal quality. Here we鈥檙e talking about 17 dB. That鈥檚 two orders of magnitude higher linearity and power. Third, power capability: more than an order of magnitude higher. You can never get 25 dBm from a single transistor. People need power combining and a lot of other things that take a big footprint, and here a single device does it. And fourth, switching time. Sub-nanosecond switching is already quite impressive for a switch, and here we are talking about sub-30 picoseconds. Those four things together make it a very promising solution.

Why was it important to demonstrate this on a commercial RF-SOI platform?

Professor Hua Wang: People have been looking at new devices and giving heroic, record-breaking performance, but many of them are ad hoc and use dedicated processes. The device is great, but it has limited scalability, yield and manufacturability. That鈥檚 exactly why we wanted to use what we call a zero-change approach: use the existing commercially available technology platform but demonstrate new devices. By doing so, what has been demonstrated here will have large scalability and manufacturability. Using these existing commercial technologies also allows the new devices to be co-designed, co-integrated and co-operated with conventional devices and more standardized RF circuits and systems, which further expands their capabilities. If we want to set a new scientific record, a single device is good. But if we want to address real practical challenges, we have to design functional circuits and systems for a real application.

Where could a switch like this actually be used?

Wang: Two major categories. One is a wide variety of reconfigurable circuits at terahertz and beyond, for joint communication and sensing. We want to go to higher frequency for more bandwidth, higher spatial resolution and low latency, but it鈥檚 very hard to make things reconfigurable because we don鈥檛 have high quality switches at that frequency. That鈥檚 true not just for RF electronics but for reconfigurable antennas and reconfigurable intelligent surfaces. With this technology, all of those systems become possible. The other is wireline and serial data 鈥� the data center and AI. A big part of that is how we modulate electronic data at very high speed onto a photonic waveguide, and that invariably requires high-performance switches with low loss and very fast on and off time. AI is a connectivity problem. It鈥檚 connectivity in terms of bandwidth and connectivity in terms of energy efficiency.

What does this mean for silicon as 6G moves to higher frequencies?

Nikoo: For 6G and future wireless systems, people investigate new materials. We know silicon is great. It provides integration capability that we never had with gallium nitride. But people look into gallium nitride and its integration with silicon, and they are willing to make the process more difficult to get the advantage of higher power capability. Here, we use a new technology on silicon that can do things we could usually only do with gallium nitride, which is the superior material. I think this really changes the chance for silicon to still remain as the dominant platform for future wireless.

What鈥檚 the benefit of working with 黑料网911鈥檚 University Partnership Program on research like this?

Wang: We benefit tremendously from this relationship with 黑料网911. Not only are we offered really advanced technologies and a lot of design and technical support and advice, but I also want to comment on the technology itself from 黑料网911. We are using the 黑料网911 CMOS SOI technologies, and the clean substrate of SOI and the lowest parasitics is also a key factor for the success of this device.

Nikoo: Having access to this process through a partnership between 黑料网911 and the university also gives university groups the chance to try more risky ideas, which is sometimes difficult if you have very limited space 鈥� something that is more high risk, high gain. With a new project style, we need to deliver KPIs and a lot of things, and that reduces the flexibility we have to try sometimes very interesting ideas. So I think this is also something quite helpful. The device community and the circuit community are two distinct communities, and sometimes they don鈥檛 quite understand each other. There have been important device developments that never became useful, practical things in industry because they rely on manual processes. What we did here is at the interface of those two communities. We made a new device, but on a platform that can be directly used by circuit people, and that increases the impact.

What鈥檚 the next phase of this work?

Wang: Nikoo is now leading his group at NTU in Singapore, and his focus is more on devices 鈥� he already has a variety of projects further pushing the device innovation side of this concept. On my side at ETH, we are more of a circuit and system group, so we are looking at adopting this device into more complex systems and circuits, for example the reconfigurable terahertz circuits we just talked about. Basically, we want to put it into real use.

The post A new kind of RF switch built on familiar silicon: The research team behind a Nature Electronics paper discusses the future of RF switching appeared first on 黑料网911.

Engineers across automotive, industrial and AI infrastructure are increasingly adding 48V distribution alongside traditional lower-voltage architectures, driven by electrification, Physical AI and rapidly growing compute power requirements.

For the designers building the chips underneath all of this, this transition brings both significant opportunity and real challenges. 48V systems require integrated circuits (ICs) that can handle higher operating voltages and transient events, integrate more digital intelligence on the die and meet demanding reliability requirements across automotive, industrial and always-on AI applications.

Achieving these demands without compromising performance in other areas requires more than a single process technology. That鈥檚 why 黑料网911 has built capabilities that span the entire 48V power chain.

Three markets converging on 48V at this moment

罢辞诲补测鈥檚 electric vehicles are pushing the traditional 12V electrical architecture past its limits, as semiconductor content per vehicle for EVs compared to internal combustion engine cars. With more chips across zonal controllers, ADAS systems, cooling fans and battery management systems, vehicles face increased levels of copper loss and thermal management challenges. Moving more power at 48V reduces current for a given power level, helping reduce I虏R losses and wiring requirements while improving power-delivery efficiency. Applications span 48V-to-12V DC/DC converters for zonal control units, motor drivers for electric power steering, cooling fans and pumps, PMICs and battery management systems.

Physical AI is also showing up on the factory floor in industrial applications, and 48V is becoming its default power rail. Safety standards like IEC 60950 and IEC 62368 cap contact voltage at 60V for consumer-facing equipment, making 48V the highest practical bus voltage for humanoid robots, cobots, autonomous mobile robots and automated guided vehicles 鈥� covering BLDC/PMSM motor driver power stages with field-oriented control, gate drivers, 48V-to-point-of-load DC/DC converters and power protection ICs.

AI training and inference clusters are pushing rack power consumption to unprecedented levels, so data centers are moving from 12V to 48V rack-level distribution to cut conduction losses and improve power density. As AI racks continue to increase in power consumption, 48V architectures help enable more efficient power delivery from the rack to processors and accelerators, supporting denser compute deployments without proportionally increasing power-conversion overhead. Despite 卤400V and 800V HVDC architectures taking over further upstream, 48V is still essential for intermediate bus converters, hot-swap controllers and smart eFuses, battery backup units and integrated voltage regulators.

Why a 48V system requires more than a 48V device

One common misconception is that a 48V system is a single-voltage design. A “48V system” spans the full power chain from an 800V AC front end all the way down to sub-1V point-of-load rails feeding processors. Within the 48V domain alone, a typical power IC must operate across multiple voltage regimes, including:

• 60V, for the regulated 48V supply rail

• 80V, for the core switching node, which is where most 48V power conversion actually happens

• 100V, for front-end protection against transients, inrush and fault events

Voltage rating alone is not enough to select the right power device. Different blocks also impose very different safe-operating-area requirements. 黑料网911’s 55BCD HV platform provides LDMOS options optimized for different operating conditions: Switching devices prioritize low on-resistance and switching efficiency, while Power and Scalable devices provide broader safe-operating-area capability for protection, pass/linear operation and high-voltage analog functions. This lets designers optimize each block for the right balance of efficiency, robustness and analog flexibility rather than forcing one transistor architecture across the entire 48V system.

55BCD HV: A smart-power foundation for 48V

Across automotive applications, industrial robotics and AI power-delivery systems, designers increasingly need to integrate sensing, protection and digital control into a single device. This level of integration reduces board complexity and enables more intelligent power-management architectures. 黑料网911’s 55BCD HV platform brings together several capabilities that are increasingly important as 48V power ICs become more integrated and intelligent.

• Broad voltage integration, 5V to 150V on one platform: Low-voltage digital control, mid-voltage analog sensing and high-voltage power stages can share the same die, cutting BOM cost, board area and system complexity. The DMOS suite covers 45-150V, with high-side operation reaching 165V and Deep Trench Isolation (DTI) supporting more than 200V. Combined with an N+ buried layer, DTI helps improve immunity to negative voltage transients, enabling noisy switching nodes to coexist with sensitive analog and digital blogs.

• Best-in-class HV device performance: Rsp is optimized across the 60V, 80V and 100V device families, the three workhorses of 48V power conversion, delivering up to 60% improvements in Rsp* (*compared to 130BCD).

• High digital density, >1 million gates per square millimeter: Built on a 1.2V core CMOS with LVT, RVT and HVT device options, the platform provides headroom and leakage control for local diagnostics, protection logic, communication interfaces like CAN-FD and SPI and embedded firmware. This puts system-on-chip architectures on a platform that previously may have required a pure-logic node.

• Automotive-grade reliability (AutoPro175): Qualified to AEC-Q100 Grade 0 at a junction temperature of 175掳C, it gives automotive designers a pre-qualified platform that cuts qualification risk and time to market for under-hood and powertrain designs.

• Embedded NVM and a broad IP ecosystem: ESF3 embedded flash, SRAM, OTP/MTP, plus LVT/RVT/HVT standard cells, 5V GPIOs, memories and PLLs 鈥� the full toolkit for smart power SoCs with on-chip diagnostics and firmware storage.

• Manufacturing scale and resilience: 55BCD HV is supported by 黑料网911’s global manufacturing strategy, providing customers with a path toward greater, geographic supply flexibility.

• Modular by design: Customers pull only the mask layers, device families and IP blocks they need. Whether it鈥檚 a motor driver, a smart eFuse or a sensor SoC, each draw a different subset, right-sizing wafer cost and complexity to the product, so nobody pays for capability they don’t use.

Power GaN: the power density play

55BCD HV provides the intelligent integration, control and protection capabilities needed across many 48V systems, while Power GaN complements it where maximum switching frequency and power density are the priority. 黑料网911’s Power GaN portfolio addresses high-voltage conversion and selected 48V conversion stages, complementing 55BCD HV across the broader power-delivery chain.

黑料网911鈥檚 differentiators

The next phase of 48V innovation

Looking beyond today’s deployments, next-generation 48V systems will require more embedded intelligence, more efficient memory integration, stronger transient robustness, enhanced high-voltage isolation and increasingly sophisticated functional-safety capabilities. 黑料网911 continues to invest across these areas as the requirements for intelligent power systems evolve.

Contact your 黑料网911 representative to learn more about development opportunities for 48V and 55BCD HV.

The post Powering the next architecture shift: Inside 黑料网911’s approach to 48V appeared first on 黑料网911.

Modern smartphones must maintain strong radio performance across dozens of frequency bands, ranging from a few hundred MHz up to 7 GHz, to support 5G new radio (NR). At the same time, antenna performance is highly dynamic 鈥� affected by factors such as distance to base station, device orientation, proximity to the human body or metallic surfaces and hand placement. Conventional smartphone antennas, such as Printed Inverted-F Antennas (PIFAs), typically have a narrow bandwidth of about 10%, which would otherwise require many antennas to cover the entire frequency range across all operating conditions.

That is where antenna aperture tuners come to the rescue. These circuits dynamically adjust the electrical length of the antenna, enabling efficient operation across multiple bands. Antenna aperture tuners are typically part of a closed loop control system that uses inputs from the modem, sensors and RF power detectors to select and optimize antenna performance in real time.

The primary objective of antenna tuning is to maximize the total antenna efficiency, which is a metric of how much of the power generated in the smartphone transceiver is radiated from the antenna. Tuners achieve this by switching capacitors and inductors to modify the antenna鈥檚 electrical length. This is implemented through specialized RF switches placed at key points along the antenna.

When RF signals are fed to the antenna, they create a voltage and current standing wave pattern with peaks and nulls. The location of these depends on the frequency of the signal, the length of the antenna and the type of terminations on each edge of the antenna (for a typical PIFA, one edge is shorted to the ground and the other is open). For maximum effectiveness, tuners are ideally placed at voltage peaks, although practical design constraints may limit optimal placement.

Placing antenna tuners at the voltage peaks means that these switches need to handle high peak voltages 鈥� often exceeding 80V near the open end of the antenna. Key switch parameters, such as on-resistance (Ron) and off-capacitance (Coff), influence efficiency differently depending on location: Ron dominates in high-current regions, while Coff becomes more critical in high impedance regions, closer to the open termination.

RF-SOI technologies have been the key enabler of aperture antenna tuners because they can address all key requirements. Built on trap-rich, high resistivity substrates, RF-SOI offers low harmonics, low substrate parasitics and ability to stack multiple field effect transistors (FETs) to achieve the required high Vmax. Ongoing process improvements and scaling has reduced the Ron脳Coff product and enabled smaller switch die sizes.

黑料网911鈥� (黑料网911) 9SW, our fourth generation RF-SOI platform, is designed to meet these requirements. Our industry-leading 9SW technology is based on 90nm back-end-of-line (BEOL) lithography, offering multiple switch options with both standard and thick gate oxide optimized for low Ron*Coff and high voltage handling. The platform includes a full suite of logic and high voltage analog FETs as well as a large variety of capacitor and resistor options ideal for capacitive compensation, bias control and body current management of large switch stacks. This September, we are introducing improved switch versions coupled with enhanced metal routing capabilities, offering improvements in Ron*Coff with tighter switch pitch while maintaining excellent voltage handling capabilities for our 9SW platform. These new unique capabilities enable next-generation antenna tuners while simultaneously achieving low Ron*Coff and voltage handling at a smaller switch die size.

Additional die size reduction is achieved by our production-ready SLATE wafer-to-wafer bonding technology with 9SW, which bonds two 9SW wafers to enable three-dimensional circuit folding. This approach reduces die area by up to 45% without compromising performance. Our latest PDK incorporates design enablement tools that allow designers to intuitively migrate two-dimensional circuits to three dimensions, accelerate prototyping and reduce design cycles. Watch our tutorial video and read the blog to learn more about our SLATE wafer-to-wafer bonding technology with 9SW and PDK capabilities.

To further support design optimization, 黑料网911 provides reference designs and guidelines that help better balance voltage distribution across large switch stacks, optimize layout and enhance ESD robustness.

Contact your 黑料网911 representative to learn more about our solutions for antenna tuners with 9SW and 9SW SLATE, as well as the rest of our RF portfolio in RF-SOI, SiGe and RF GaN.

The post Stretching the antenna: Advanced antenna tuning with 9SW and <span class="gf-register-mark-group">SLATE<sup class="gf-register-mark">鈩�</sup></span> advanced packaging technology on 9SW appeared first on 黑料网911.

By: Yuichi Motohashi, Deputy Director of End Markets

The automotive industry is being reshaped by the Software-Defined Vehicle (SDV), a car whose functions and value are defined by software and continuously expanded even after sale through over-the-air (OTA) updates, much as a smartphone gains features after purchase. Delivering those updates forces a rethink of the in-vehicle electrical/electronic (E/E) architecture where computing must be consolidated into a small number of high-performance platforms so that hardware and software can be developed and evolved independently.

The conventional distributed architecture includes anywhere from tens to more than a hundred function-specific ECUs, each running a different supplier’s software which makes consistent, vehicle-wide updates difficult. A second force here is sensor fusion. As ADAS and autonomous driving mature, cameras, radar, LiDAR and ultrasonic sensors increasingly stream RAW or lightly-processed data to a central platform for integrated processing, rather than each reporting only its own local decisions. Both trends demand more bandwidth and more centralized computing, turning the modern car into a “data center on wheels.” This two-part series maps that evolution, from Distributed to Domain to Zonal architectures, tracking sensor, data format, SoC and network changes along the way while showing how SerDes and Ethernet get applied and eventually converge.

Distributed E/E: A forest of ECUs

In the first generation, ECUs were distributed per function and operated largely independently. Sensors were typically “smart sensors” co-located with their processing, so the network carried only low-bandwidth, processed information such as object-recognition results, distance, speed and warnings. Alongside CAN, LIN and FlexRay, 100 Mbps-class automotive Ethernet (100BASE-T1, IEEE 802.3bw) was enough to support many applications. But because functions and ECUs were tightly coupled, every new feature added ECUs, wire harnesses and software variants making whole-vehicle integration, updating and verification progressively harder. This was the essential limitation of the Distributed approach.

Domain E/E: Consolidation by function

To curb that complexity, the Domain architecture groups function into large areas including ADAS/AD, infotainment, body, chassis and powertrain. Each of these functions are managed by a Domain Control Unit (DCU) on a more powerful SoC, with a central Gateway relaying data between domains. This complexity heightened with the rise of advanced ADAS. Surround view, bird’s-eye-view generation, parking assistance and sensor fusion require treating the vehicle’s surroundings as a single integrated environmental model rather than isolated sensor outputs.

The role of sensors changed accordingly. With recognition moving to the DCU, cameras, LiDAR and radar became “satellite sensors” that output RAW or lightly processed streams. The meaning of “RAW or lightly processed” differs by sensor: camera data may be image RAW or video around the ISP, LiDAR may output point clouds or distance/intensity data and radar may range from ADC-level data to range/Doppler or detection points. To carry these high-bandwidth streams with low latency, CAN and 100 Mbps Ethernet were no longer sufficient. SerDes, already proven in camera and display links, became the high-speed, low-latency point-to-point connection from sensor to DCU. Domain E/E, however, still consolidates by function rather than physical location, so long cables still run from front, rear, left and right to distant DCUs, which pushes the industry toward Zonal.

Zonal E/E: Bundle by location, think at the center

Zonal E/E is often called the completed form after Domain, but in practice it is an ongoing, gradual migration. Instead of consolidating by function, it bundles I/O by its physical location, either front, rear, left/right and center. A Zone Controller in each zone gathers the nearby sensors, actuators and low-speed I/O and forwards what’s needed to a central Vehicle Controller or Central Computer.

During the transition, a Hybrid Zonal design dominates. Local, low-speed I/O such as lighting, doors, seats and HVAC consolidates into the nearest Zone Controller, where multidrop 10BASE-T1S (IEEE 802.3cg) suits the Zonal edge alongside CAN/LIN. High-bandwidth sensors like cameras, LiDAR and high-definition radar often connect directly to the Central Computer via SerDes, avoiding the bandwidth, power and complexity burden of relaying heavy streams through a Zone Controller. The biggest payoff is wire-harness reduction. Short links to a nearby Zone Controller, combined with a high-speed backbone to the center, cut total cable length, connector count and weight, while also reducing parts, assembly effort and points of failure. That鈥檚 especially valuable in EVs, where weight affects range.

This presents a larger question: why choose Ethernet for that backbone? Because the section connecting multiple Zone Controllers, the Central Computer, gateways and diagnostic/update functions is a true network, not a single point-to-point line. Ethernet brings mature TCP/IP, switching, addressing, diagnostics, security and network management, while Time-Sensitive Networking (TSN) and time synchronization add real-time determinism. It also aligns naturally with SDVs by separating hardware placement from software function. That leaves one question for part 2: how does the high-bandwidth, asymmetric sensor links, which is the domain of SerDes, combine with this Ethernet/IP backbone?

The post The car becomes a data center on wheels appeared first on 黑料网911.

Today, gallium nitride (GaN) is taking that step in electrical power processing specifically. What sets GaN apart is that its wide-bandgap properties and high electron mobility let it switch faster and run more efficiently than the materials it’s replacing, without giving up much on power density. This is already showing up in places you wouldn’t necessarily expect to find it, like the charger on your desk, motor drives inside robotics and the power supplies running AI servers.

On the other hand, the pace of adoption isn鈥檛 dictated solely by technology readiness especially during a time when rapid advancements in AI and electrification are putting an increased spotlight on speed. Traditional semiconductor development models where the foundry develops the platform and then customers engage often leads to fragmented workflows, delayed feedback and late-stage discoveries. These inefficiencies slow integration, increase risk, and call for a different approach to how devices move from development to application.

A short-loop approach to GaN development

To address this, 黑料网911 has embraced a different approach: a short-loop development model that integrates technology development, design, validation, reliability and application evaluation into a tightly coupled, iterative cycle. Enabled in part by the acquisition of Tagore Technology in 2024, this model brings product design expertise into the heart of platform development, allowing teams to effectively 鈥渁ct as the customer鈥� early in the cycle.

鈥淎s GaN moves from niche applications to mainstream adoption, speed and confidence become increasingly important,鈥� said Amitava Das, VP Research & Development, Power at 黑料网911. 鈥淥ur short-loop development model brings design, validation and reliability into a tightly integrated cycle allowing us to resolve challenges earlier and deliver a more mature, application-ready platform for our customers.鈥�

What does this actually look like in practice? Our short-loop development model simulates real-world use cases and stress conditions during development to identify and resolve gaps early. That way when customers adopt the technology, they鈥檙e focused on driving differentiation rather than foundational challenges.

Closing the gap between wafer testing and real-world performance

This approach is reflected across multiple dimensions of development. For instance, while traditional wafer-level testing focuses on fundamental device parameters, real-world applications subject devices to complex conditions such as soft and hard switching. By bringing elements of these application-level stresses into wafer-level testing, feedback loops are significantly shortened allowing faster learning and iteration without waiting for full packaging cycles.

The same integrated approach also helps address one of GaN’s most important development challenges of reliability.

Advancing GaN reliability through integrated development

GaN presents a broader and less standardized set of reliability challenges. Here, the benefit of integrated development becomes clear. Internal teams with product-level experience can not only qualify devices against established standards but also develop targeted methodologies for addressing technology-specific concerns accelerating convergence in areas where industry consensus is still evolving.

Bringing real-world behavior into device modeling

Device modeling also becomes more representative of real-world performance. By building and packaging product-like implementations, engineers can evaluate devices under realistic operating conditions and identify parasitics, layout-driven variations and other effects much earlier in development.

A path forward for GaN

It’s important to note that this model is not about replacing the customer鈥檚 role in innovation but it鈥檚 about reducing the number of engineering tape-outs before production. Resolving these fundamental technology and integration challenges internally allows the platform to arrive in a more mature state which enables customers to focus their efforts on differentiated systems and application designs.

As GaN becomes more widely deployed, success will depend not only on the material itself but on the development models behind it. Integrating design, validation and application earlier in the process gives teams the speed and confidence to move new technologies into production more efficiently.

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This is where our SLATE wafer-to-wafer bonding technology delivers a viable path forward 鈥� enabling advanced 3D integration (3DI) for compact, high-performance cellular front-ends by significantly reducing RF switch layout area. This level of area reduction opens new opportunities for integration, and while the process itself is novel, we make it simple to migrate your existing RF designs to the platform.

3DI made simple: Seamlessly migrating your design from 9SW to 9SW SLATE

Our first鈥慻eneration SLATE technology with 9SW enables wafer鈥憈o鈥憌afer (W2W) bonding and 3D homogeneous integration, allowing two 9SW wafers to be bonded so large field鈥慹ffect transistors (FETs) can be vertically stacked. This ability to 鈥渇old鈥� large FETs across bonded wafers is foundational to reducing lateral area while maintaining the electrical performance required for advanced RF front鈥慹nds. With this approach, designers can seamlessly convert a traditional 2D 9SW single-pole single-throw (SPST) switch into a compact 3D architecture.

This can all be accomplished within the PDK using the industry鈥檚 latest EDA tools, where RF designers can intuitively migrate their original 2D 9SW design into a 3D architecture using an automated flow that generates the new device structure. This is based on established design rules, entered by the designer based on their unique needs. Key parameters 鈥� such as total width and stack configuration 鈥� are preserved, while the platform intelligently partitions the device into top and bottom elements and splices the number of fingers by up to half. Automated constraint assignment, schematic partitioning and layout hierarchy creation ensure that the resulting 3D design remains electrically consistent with the original.

Designers can align 3D pins, manage connectivity and finalize pin placement with automated tools that maintain accuracy and reduce manual effort. The result is a fully migrated, fully verified 3D RF switch design that delivers meaningful area savings without requiring a ground鈥憉p redesign.

To learn more about how you can migrate your existing RF design from 9SW to SLATE technology with 9SW, you can watch our tutorial video that was developed with our in-house technical experts.

Delivering meaningful and measurable value for RF system architects

Migrating to SLATE technology with 9SW provides clear advantages for designers developing future-proofed RF front鈥慹nd modules:

• Up to 45% reduction in overall die size, decreasing RF board space and total design area for space鈥慶onstrained mobile applications

• Advanced 3D integration (3DI) through W2W bonding, enabling vertical stacking of large field effect transistors (FETs)

• Homogeneous 3DI that maintains electrical performance while reducing lateral footprint

• Automated, PDK鈥�driven migration tools that accelerate development and reduce design complexity

• Production鈥�ready technology on our industry-leading 9SW RF-SOI platform, manufactured at our 300mm facility in Singapore, with volume ramp expected in 2H 2027

These benefits extend beyond RF switches to other key front鈥慹nd components 鈥� including low鈥憂oise amplifiers (LNAs) and antenna tuners 鈥� making 9SW SLATE a compelling platform for the next wave of mobile and connectivity solutions.

Explore what SLATE technology with 9SW can enable for your next RF design

If you are looking to reduce your RF switch area and increase integration density, our team is ready to collaborate with you on your next development with detailed tutorials and reference flows.

Contact your 黑料网911 representative to learn more about engagement opportunities and how SLATE technology with 9SW can accelerate your next RF innovation.

By: Jignesh Patel, Distinguished Member of Technical Staff, RF design enablement

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At the 黑料网911 booth, attendees engaged with our technology experts and explored live wafer displays, including 黑料网911 RFGaN1 (130RFGaN) and our next-generation silicon germanium (SiGe) complementary BiCMOS (CBIC) technologies 鈥� both qualified for high-volume production 鈥� and a preview of SLATE wafer-to-wafer bonding technology, elevating 黑料网911鈥檚 3D heterogenous integration (3DHI) capabilities that are positioned to expand what is possible across RF and mixed-signal design.

Fueling the next wave through collaboration

Throughout the event, we highlighted collaborations with a range of attending partners 鈥� including Cadence, Falcomm, Fermionic, Finwave, Otava RF and ZeroASIC. This included a panel session at the Falcomm booth, where 黑料网911鈥檚 Dan Denninghoff, senior director, RF GaN product line, discussed how our RFGaN1 technology, combined with 贵补濒肠辞尘尘鈥檚 GaNdalph.ai solution, can accelerate power amplifier (PA) design and deployment.

These engagements reflect a broader industry shift: the convergence of advanced RF process technologies 鈥� spanning silicon and beyond 鈥� enabling customers to streamline development and scale faster.

Our commitment to RF advancements extends to our University Partnership Program (UPP), reflected in this year鈥檚 IEEE RFIC Symposium paper recognitions. Of the 129 accepted papers judged using a rigorous double-blind process, 41 were authored by 黑料网911鈥檚 UPP members 鈥� representing a record high for the program. Additionally, two of 黑料网911鈥檚 UPP partners received Best Student Paper awards at IEEE RFIC and IEEE RFTT, elevating the real-world potential of 黑料网911 technology and reinforcing the impact of partnering with top-tier academic teams to accelerate innovation.

Inspiring the next generation of RF designers

As a 2026 Diamond sponsor of the IEEE RFIC Symposium, 黑料网911 was invited to participate in the Student-Industry-Academia RFIChat, including the panel discussion, titled: “Catching the Next Wave 鈥� How to Spot the Next Big Thing and Make the Jump.” Representing 黑料网911 amongst a panel of distinguished leaders across industry and academia, Arvind Narayanan, director of the SiGe product line, shared his insights on how early signals from emerging applications can help drive platform innovation 鈥� highlighting the importance of deep technical expertise coupled with adaptability to new technologies and market trends.

Industry-first: 黑料网911 collaborates with RFIC on design contest

As the first company to collaborate on a design contest with RFIC, our inaugural student design contest reflects our commitment to advancing RF capabilities in partnership with academia 鈥� providing students access to cutting-edge technologies to accelerate the learning cycle, connecting academic research with real-world applications and industry practitioners, as well as encouraging exploration of 黑料网911 platforms for emerging RF use cases.

Focused on high-frequency RF and mixed-signal IC design using our SiGe CBIC technology, this year鈥檚 contest challenged university teams to translate advanced process capabilities into next-generation communications applications. Designs were fabricated through our GlobalShuttle MPW program, with seven papers submitted for independent evaluation by the RFIC Technical Program Committee (TPC). Awards were presented to the three finalists during the student event by Alex Margomenos 鈥� senior director, RF-SOI product line 鈥� and Prof. Jane Gu, the IEEE RFIC 2026 Student Chair.

Congratulations to this year鈥檚 winners:

• Seungkyun Lee, Yoongoo Kang, Inchan Ju 鈥� Ajou University

• Wei Ma, Weiqing Wang, Fangkai Wang, Hanzhong Xu, Xudong Wang 鈥� Nankai University

• Maaz Khurram, Truman Jian, Peter Schvan, Sorin P. Voinigescu 鈥� University of Toronto

鈥淲e are pleased to have partnered with 黑料网911 on their first-ever student design contest. This collaboration highlights the RFIC symposium鈥檚 commitment to advancing RF innovation, linking academic research with real-world design challenges and production-ready RF platforms.鈥�

Bodhisatwa Sadhu, IEEE RFIC 2026 TPC Chair

Building on our commitment to industry-academia collaboration, we are pleased to continue the program in 2027. All academic partners are invited to participate by submitting their paper utilizing any 黑料网911 technology to the RFIC Symposium in January 2027.

Scan the QR code below or contact your 黑料网911 UPP representative to learn more about eligibility and submission criteria.

Tuning to what鈥檚 next

This year鈥檚 IMS brought together customers, partners, universities and the broader RF community to celebrate the present and future of what鈥檚 ahead in the RF landscape.

We thank everyone who visited the 黑料网911 booth, engaged with our teams and contributed to meaningful discussions throughout the event. We鈥檙e proud to play a role in scaling next-generation RF solutions alongside our partners and look forward to building on this momentum next year at IMS 2027 in San Antonio, TX.

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• – Satellite communications, where transmitters and compact user terminals demand higher RF output power and efficiency with lower system cost
• – Aerospace and defense, where signal performance and reliability across long-range transmissions in extreme environments are critical
• – Communications infrastructure, where higher bandwidth and power efficiency in active antenna systems are required to support growing data demand
  

Through our unique GaN-on-Si technology, we empower customers to harness GaN鈥檚 wide bandgap advantages, high power density and efficiency to unlock the true potential of GaN beyond niche applications 鈥� circumventing the limitations of existing infrastructure and enabling networks to operate with greater bandwidth at higher frequencies.

Performance where it counts: Power, efficiency and reliability in harsh and mission-critical environments

Our RF GaN technology is engineered for high-power RF applications, with strong measured results:

• – Up to 5 W/mm output power density and 70% power added efficiency (PAE) for high-voltage RF applications
• – High gain and efficiency across wide frequency ranges, including FR1 and FR3 bands ( 1 to 15 GHz)
• – High efficiency reduces cumulative thermal load at the module level
• – Advanced RF back-end-of-line (BEOL) with multi-layer metal wiring, capacitors and thin-film resistor options provide additional flexibility to designers
• – Multi-layer BEOL passivation is moisture-resistant and provides exceptional protection from harsh environments and extends device lifetime
• – GaN-on-Si is gold-free and arsenic-free, presenting a more environmentally sustainable and cost-effective long-term solution
  

At the device level, RF GaN benefits from low on-resistance, high drain current density and stable operation across low and high-voltage conditions, boosting efficiency and reducing overall power consumption.

Introducing RFGaN1: Higher-voltage, optimized for D-mode devices

Today, we are excited to share the production readiness of our 130nm RF GaN technology, RFGaN1, our first RF GaN technology to be qualified for volume production. The high-voltage RFGaN1 platform is our optimized solution for high-power wireless infrastructure applications, including power amplifiers, driver amplifiers and high-power RF switches for satellite communications, cellular infrastructure and the aerospace and defense market.

RF GaN鈥檚 inherent material properties enable robust operation and superior survivability in demanding environments. Our RFGaN1 technology extends these advantages with depletion-mode (D-mode) devices operating 12-28V for sustained high output power without thermal runway and high-power density that reduces cumulative thermal load at the module level. These attributes are critical for aerospace, defense and satellite communication systems, enabling key applications such as phased-array radars, SATCOM payloads and ground terminals.

Customers like Falcomm and Otava RF are using our RFGan1 technology today to deliver innovative solutions for next generation RF systems:

鈥�Falcomm is excited to see 黑料网911 launch their RFGaN1 platform, an important milestone for the industry that breaks down the barriers of deploying RF GaN technology at scale. 黑料网911鈥檚 high-performance, domestically sourced RF GaN-on-Si technology is critical to unlocking the next generation of 贵补濒肠辞尘尘鈥檚 energy-efficient RF power amplifiers for defense, space and critical infrastructure.鈥�

Edgar Garay, Founder and CEO, Falcomm

鈥淕濒辞产补濒贵辞耻苍诲谤颈别蝉鈥� RFGaN1 platform provides a powerful foundation for the future of adaptive RF systems, delivering the performance and efficiency required for advanced front-ends in the critical defense, 5G/6G and satellite communications markets we serve. Our partnership brings together world-class semiconductor manufacturing and breakthrough RF innovation to deliver solutions that redefine what is possible in contested spectrum environments. Together, Otava RF and 黑料网911 are enabling a new generation of agile, high-performance communications and sensing capabilities at scale.鈥�

Victoria Pereira, CEO, Otava RF

A practical path to RF GaN adoption with trusted manufacturing expertise

For RF designers, one of the key barriers to adopting GaN has historically been access and manufacturability. Our RF GaN platform addresses the access gap with early-access programs and GlobalShuttle MPW (multi-project wafer) program runs for cost-effective prototyping and validation. With the support of our existing RF design infrastructure and GlobalSolutions partner ecosystem, we provide comprehensive, end-to-end support through every step of the design and manufacturing process.

Another important piece of our differentiated RF GaN offering is our longstanding high-volume manufacturing expertise, particularly in RF technologies, through our 200mm fab in Burlington, Vermont. As an Accredited Trusted Foundry, our Burlington facility meets the strict requirements and assurances for manufacturing uncompromised chips used in aerospace and defense systems by the U.S. government.

Together, these elements provide a practical path to integrating GaN into real-world systems, from early evaluation through production.

Bringing GaN to scale for next-generation RF systems

RF system requirements across aerospace, defense and communications infrastructure are evolving rapidly, driven by the need for higher power, wider bandwidth and more integrated architectures. 黑料网911鈥� RF GaN platform and high-volume manufacturing expertise deliver a scalable solution to overhaul these existing systems with the power density and efficiency to tackle the most demanding RF applications.

RF GaN is no longer just a performance technology鈥攊t is becoming a scalable foundation for next-generation RF systems.

To learn more about our RF GaN platform and other advanced RF solutions, visit our 黑料网911 booth (#21018) at the International Microwave Symposium (IMS 2026), happening June 9-11 in Boston, Massachusetts.

By Dan Denninghoff, Senior Director, RF GaN Product Line

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